1. Field of the Invention
The invention relates to an ESD (Electrostatic Discharge) protection circuit, and more particularly to an ESD protection circuit for internal circuits using different voltage sources.
2. Description of the Related Art
An ESD (Electrostatic Discharge) protection circuit often applied in an integrated circuit. Owing to the large voltage of electrostatic charge, the integrated circuit must utilize the ESD protection circuit to prevent the electrostatic charge from damaging internal circuits of the integrated circuit.
However, with the evolution of the technology, different voltage sources are used for the different internal circuits of the integrated circuit. Therefore, the ESD protection circuit is not only disposed between signal input and output bonding pads of the internal circuits, but also disposed between different voltage sources in the integrated circuit. The invention is disclosed with respect to this condition.
FIG. 1 is a schematic illustration showing a conventional ESD protection circuit for internal circuits with different voltage sources. Referring to FIG. 1, the integrated circuit 100 includes an internal circuit 110 using a voltage source with two voltage terminals VDD1 and VSS1, and an internal circuit 120 using another voltage source with two voltage terminals VDD2 and VSS2. Besides, the output signal 121 of the internal circuit 110 can be inputted to the internal circuit 120 through inverters 123 and 125 which are used as the interface circuits for the internal circuits 110 and 120.
The ESD protection mechanism for the integrated circuit 100 is implemented by using ESD clamp circuits 130 and 140 and ESD protection circuits 150 and 160 as shown in the FIG. 1.
For example, when the ESD occurs between the VDD1 and the VSS2, the large ESD current may flow from the VDD1 to the VSS2, or from the VSS2 to the VDD1. In order to prevent the large ESD current from damaging the internal circuits 110 and 120 or the inverters 123 and 125, the clamp circuits 130 and 140 are turned on to discharge the ESD current. Therefore, the large current I1 may be discharged along the path P1 and path P2. That is, the ESD current may be discharged to VSS2 through diodes 151 and 153 of the ESD protection circuit 150 and the clamp circuit 130, and may be discharged to VSS2 through the clamp circuit 140 and the substrate resistor Rs of the ESD protection circuit 160.
Similarly, when the ESD occurs between the VDD2 and the VSS1, the large ESD current may be discharged from the VDD2 to the VSS1 through the ESD protection circuit 150 and ESD claim circuit 140, or through the ESD protection circuit 160 and the ESD clamp circuits 130. So, the large ESD currents may be discharged without damaging the internal circuits 110 and 120 or the inverter 123 and 125.
In addition, the ESD protection circuit 150 is not only for providing discharging path, but also for isolating the two voltage terminals VDD1 and VDD2 from each other. Thus, the two internal circuits 110 and 120 can independently use their own voltage sources during the absence of the electrostatic charge. Therefore, the ESD protection circuit 150 must have a predetermined threshold voltage to effectively isolate the two voltage terminals VDD1 and VDD2 from each other.
Hence, the voltage drop of the two serially connected diodes 151 and 153 being forward conducted has to be larger than the voltage difference between the VDD1 and the VDD2. For instance, if the voltage of the VDD1 is 1.8V and the voltage of the VDD2 is 3.3V, the voltage drop of the serially connected diodes 151 and 153 being forward conducted has to be larger than 1.5V.
In addition, when the voltage difference between the VDD1 and the VDD2 becomes larger, the number of the serially connected diodes of the ESD protection circuit 150 also has to be correspondingly increased in order to effectively isolate the VDD1 and the VDD2 from each other.
FIG. 2 is a schematic illustration showing another conventional ESD protection circuit for an integrated circuit using hybrid voltage sources. As shown in FIG. 2, when the voltage difference between the voltage sources VDD3 and VDD4 is increased, the number of serially connected diodes in the ESD protection circuit 230 should be correspondingly increased. The diodes in the ESD protection circuit are formed based on PMOS or NMOS transistors (not shown). However, the diode of the conventional ESD protection circuit causes the following drawbacks.
1. The diode has a higher leakage current and a lower breakdown voltage, and cannot effective isolate two independent voltage sources from each other.
2. The capability of the diode for driving current is not very good, and thus the current caused by the ESD cannot be discharged quickly.
3. The parasitic capacitance of the diode coupled between two independent powers is larger, and tends to affect the signal between the two internal circuits.
In view of this, the invention proposes an ESD protection circuit to solve the above-mentioned problems.